Neo Geo+ Mod Promises Superiority Over Emulation
▼ Summary
– The Neo Geo+ console will use newly manufactured, re-engineered chips to replicate the original hardware, not software emulation or FPGA approximation.
– FPGA specialists Jotego and Furrtek are involved in the project, with their work likely forming the basis for the new console’s ASIC.
– Furrtek believes the console has the ambition to be the best since SNK’s original hardware, aiming to offer more than existing emulation options.
– A contrasting view from FPGA developer Pramod Somashekar criticizes the approach as a “bait and switch,” arguing it essentially repackages an existing FPGA core into multiple ASICs.
– The console is designed to natively play both new and old Neo Geo cartridges for an authentic experience.
The upcoming Neo Geo+ console from Plaion and SNK is generating significant interest for its unique technical approach. Rather than relying on software emulation or a single FPGA, the system is built around newly manufactured chips that replicate the original hardware. This method, described by the company as a true console reincarnation, aims to deliver a native and authentic experience for both new and old game cartridges. The project’s credibility is bolstered by the involvement of respected FPGA specialists, suggesting a serious commitment to hardware accuracy.
Recent social media activity indicates that engineers Jotego and Furrtek are contributing to the chip design under non-disclosure agreements. Furrtek, a notable figure in Neo Geo hardware modification, hinted that the console has the potential to be the best reproduction since SNK’s original manufacturing ceased. He clarified that the goal is to offer more than existing solutions, moving beyond a simple repackaging of available emulation cores like MAME or the MiSTer project. This ambition to honor the brand and respect the fans through superior hardware is a key selling point.
However, this specific technical path has drawn criticism from within the development community. FPGA expert Pramod Somashekar has characterized the approach as a potential bait and switch for consumers. He argues that the system essentially utilizes the existing MiSTer core design, but distributed across multiple application-specific integrated circuits (ASICs) instead of one FPGA. This critique directly challenges the marketing message that distances the product from emulation and FPGA approximation. Somashekar also points out a fundamental limitation in this multi-ASIC strategy, suggesting it may not represent the novel engineering feat implied by the promotional language. The debate highlights the fine line between innovative re-engineering and sophisticated repurposing in the retro hardware market.
(Source: Timeextension.com)